Active HDL
Active-HDL is an integral FPGA design and verification solution, with design entry, high-performance mixed language simulator and a easy-to-use FPGA design flow manager integrated all FPGA vendors, to simulate, synthesis and implement industry-leading FPGA devices from Microsemi (Actel), Altera, Lattice, Quilklogic, Xilinx and more. As a powerful FPGA design platform, Active-HDL evokes over 80 EDA and FPGA tools.

For more...

Alint
Alint is a RTL design analysis tool, identifies critical design issues early in the design stage. the tool point out the coding style, structure and compatibility problem of VHDL, Verilog and mixed language before simulation and synthesis. even more, Alint reduce the verification time of comprehensive FPGA and ASIC design with a unified, reusable and reliable code, and highly reduce the risks of redundant design iteration and costly re-spins.

For more...

Riviera-PRO
Riviera-Pro is a single-core, multi-platform RTL simulator, for Verilog, SystemVerilog, SystemC/C/C++ and EDIF design. Riviera-Pro verification platform delivers advanced editor, tracing, debugging , simulation coverage and so on, achieves the fastest speed in command line mode. Riviera-Pro supports the most verification methods, including ESL, TLM, OVM, VMM and verification methods based on assertion.

For more...

HES
HES is a general hardware emulation and co-simulation solution for large and complex ASIC or FPGA designs. The advantage of the tool is automatically design compilation, the standard test interface, integration of industry-leading hardware and software debugging tools, and support for transaction-level ASIC prototyping.

For more...

DO-254 CTS
DO-254 CTS is a patented, closed circle function verification solution, is dedicated to at speed in-target testing, consists of a fully customized software, hardware, analysis, documentation and qualification of EDA tools, to achieve 100% function verification coverage.DO-254 CTS is compatible with the verification level A,B,C,D defined in chapter 6.2 verification process of DO-254/ED80 and chapter 11.4 Tool Assessment and Qualification Process.

For more...

Actel RTAX and RTSX Prototyping
Aldec and Microsemi have joined together, offering a new, innovative, reprogrammable prototyping solution for Microsemi RTAX-S/SL and RTSX-SU space-fight system designs. Unlike the traditional OTP (One Time Programmable) anti-fuse space-qualified FPGAs, the Aldec prototype adaptor uses flash-based, Microsemi ProASIC®3E FPGA technology, for design prototype re-programmability.

For more...